I. Field of the Invention
This invention pertains to semiconductor devices having improved high voltage terminations. More particularly, the present invention pertains to semiconductor devices having improved junction termination extensions which allow for an increased surface breakdown junction voltage. In addition, this invention pertains to a method of manufacturing semiconductor devices having improved junction termination extensions for increasing the surface breakdown junction voltage.
II. Background Art
Semiconductor devices having regions of alternate conductivity suffer breakdown when operated at high voltages. The specific voltage where breakdown occurs is the breakdown voltage. In planar high voltage technology where a P-N junction is diffused into a silicon substrate or wafer having a major surface, the portion of the device most susceptible to breakdown occurs at the region of the junction located on the major surface of the substrate (surface junction) which is in close proximity to the edge of the substrate.
For a given high voltage applied across a P-N junction, breakdown will occur at the surface junction sooner than at the junction region in the bulk of the substrate beneath the major surface because the presence of additional charges on the major surface results in a higher electric field at the major surface. This breakdown is referred to as surface junction breakdown.
In an effort to reduce the threat of surface junction breakdown, prior art semiconductor devices have employed field shield plates disposed on the major surface of the substrate over the surface junction to better distribute the electric field that exists on the major surface. In addition, the surface junction has also been extended by interposing at the surface junction between the P material and N material, a lightly doped region. Thus, for example, in a diode where a P region is formed in an N- substrate so that a P/N- surface junction is formed, a lightly doped P region (P-) is deposited at the surface between the P and N- regions, thereby creating a surface junction extension. The P- junction extension region forms a controlled gradient of the doping concentration between the P and N- regions of the device at the major surface which further reduces surface breakdown.
Semiconductor devices utilizing field shield plates and junction extensions are disclosed in C. A. Goodwin, et al, "A Dielectrically Isolated Bi-Polar CMOS-DMOS (BCDMOS) Technology For High Voltage Applications," Proceedings of the Symposium on High Voltage and Smart Power Devices, Vol. 87-13, pages 79-129. While such prior art devices have an improved high voltage termination over devices not utilizing field shield plates and junction extensions, such devices still suffer surface breakdown at about 350 volts. It is, therefore, desirable to have a high voltage semiconductor device having an increased high voltage termination.
Accordingly, it is an object of this invention to provide a semiconductor device having improved high voltage termination.
It is another object of the present invention to provide a junction extension and field shield plate configuration having an increased high voltage termination.
It is a further object of the present invention to provide a method for manufacturing semiconductor devices having an improved high voltage termination.
Other objects will become apparent as the following description proceeds.
The foregoing as well as additional details of the present invention will become apparent from the following detailed description and annexed drawings of the presently preferred embodiment thereof.